Super I/O Chips

The third major chip seen on many PC motherboards is called the Super I/O chip. This is a chip that integrates devices formerly found on separate expansion cards in older systems. Most Super I/O chips contain, at a minimum, the following components:

  • Floppy controller

  • Dual serial port controllers

  • Parallel port controller

The floppy controllers on most Super I/O chips handle two drives, but some of them can handle only one. Older systems often required a separate floppy controller card. The dual serial port is another item that was formerly on one or more cards.

Most of the better Super I/O chips implement a buffered serial port design known as a universal asynchronous receiver transmitter (UART), one for each port. Most mimic the standalone NS16550A high-speed UART, which was created by National Semiconductor.

By putting the functions of two of these chips into the Super I/O chip, these ports are essentially built in to the motherboard. Virtually all Super I/O chips also include a high-speed multimode parallel port. The better ones allow three modes: standard (bidirectional), Enhanced Parallel Port (EPP), and the Enhanced Capabilities Port (ECP) modes.

The ECP mode is the fastest and most powerful, but selecting it also causes your port to use an ISA bus 8-bit DMA channel—usually DMA channel 3. As long as you account for this and don't set anything else to that channel (such as a sound card and so on), the EPC mode parallel port should work fine.

Some of the newer printers and scanners that connect to the system via the parallel port use ECP mode, which was invented by Hewlett-Packard. The Super I/O chip can contain other components as well. For example, the Intel VC820 ATX motherboard uses an SMC (Standard Microsystems Corp.) LPC47M102 Super I/O chip. This chip incorporates the following functions:

  • Floppy drive interface

  • Two high-speed serial ports

  • One ECP/EPP multimode parallel port

  • 8042-style keyboard and mouse controller

This chip is typical of recent Super I/O chips in that it has an integrated keyboard and mouse controller. Older Super I/O chips lacked this feature. One thing I've noticed over the years is that the role of the Super I/O chip has decreased more and more in the newer motherboards.

This is primarily due to Intel and other chipset manufacturers moving Super I/O functions, such as IDE, directly into the chipset South Bridge or ICH component, where these devices can attach to the PCI bus (North/South Bridge architecture) or to the high-speed hub interface (hub architecture) rather than the ISA bus.

One of the shortcomings of the Super I/O chip is that originally it was interfaced to the system via the ISA bus and shared all the speed and performance limitations of that 8MHz bus. Moving the IDE over to the PCI bus allowed higher-speed IDE drives to be developed that could transfer at the faster 33MHz PCI bus speed.

Newer Super I/O chips interface to the system via the LPC bus, an interface designed by Intel to offer a low-speed connection (up to about 6.67MBps) using only 13 signals.

Although technically slower than ISA, it is much more efficient. Because high-speed devices such as IDE/ATA drives are now interfaced through the South Bridge chip or PCI bus, nothing interfaced through the current Super I/O chips needs any greater bandwidth anyway.

As the chipset manufacturers combine more and more functions into the main chipset, and as USB- and IEEE-1394-based peripherals replace standard serial, parallel, and floppy controller–based devices, we will probably see the Super I/O chip continue to fade away in motherboard designs.

More and more chipsets are combining the South Bridge and Super I/O chips into a single component (often referred to as a Super South Bridge chip) to save space and reduce parts count on the motherboard. Several of the SiS chipsets even integrate all three chips (North Bridge, South Bridge, and Super I/O) into a single chip.

Motherboard CMOS RAM Addresses

In the original AT system, a Motorola 146818 chip was used as the RTC and Complementary Metal-Oxide Semiconductor (CMOS) RAM chip. This was a special chip that had a simple digital clock, which used 10 bytes of RAM and an additional 54 more bytes of leftover RAM in which you could store anything you wanted.

The designers of the IBM AT used these extra 54 bytes to store the system configuration. Modern PC systems don't use the Motorola chip; instead, they incorporate the functions of this chip into the motherboard chipset (South Bridge) or Super I/O chip, or they use a special battery and NVRAM module from companies such as Dallas or Benchmarq.