Many confusing specifications often are quoted in discussions of processors. The following sections discuss some of these specifications, including the data bus, address bus, and speed. The next section includes a table that lists the specifications of virtually all PC processors. Processors can be identified by two main parameters: how wide they are and how fast they are.

The speed of a processor is a fairly simple concept. Speed is counted in megahertz (MHz) and gigahertz (GHz), which means millions and billions, respectively, of cycles per second—and faster is better! The width of a processor is a little more complicated to discuss because three main specifications in a processor are expressed in width. They are:

• Data I/O bus
• Address bus
• Internal registers

Note that the processor data bus is also called the front side bus (FSB), processor side bus (PSB), or just CPU bus. All these terms refer to the bus that is between the CPU and the main chipset component (North Bridge or Memory Controller Hub). Intel uses the FSB or PSB terminology, whereas AMD uses only FSB.

Personally I usually just like to say "CPU bus" in conversation or when speaking during my training seminars because that is the least confusing of the terms while also being completely accurate. The number of bits a processor is designated can be confusing. All modern processors have 64-bit data buses; however, that does not mean they are classified as 64-bit processors.

Processors such as the Pentium 4 and Athlon XP are 32-bit processors because their internal registers are 32 bits wide, although their data I/O buses are 64 bits wide and their address buses are 36 bits wide (both wider than their predecessors, the Pentium and K6 processors). The Itanium series and the AMD Opteron and Athlon 64 are 64-bit processors because their internal registers are 64 bits wide.

Data I/O Bus

Perhaps the most important features of a processor are the speed and width of its external data bus. This defines the rate at which data can be moved into or out of the processor. The processor bus discussed most often is the external data bus—the bundle of wires (or pins) used to send and receive data.

The more signals that can be sent at the same time, the more data can be transmitted in a specified interval and, therefore, the faster (and wider) the bus. A wider data bus is like having a highway with more lanes, which enables greater throughput.

Data in a computer is sent as digital information consisting of a time interval in which a single wire carries 3.3V or 5V to signal a 1 data bit or 0V to signal a 0 data bit. The more wires you have, the more individual bits you can send in the same time interval.

All modern processors from the original Pentium through the latest Pentium 4, Athlon XP, Athlon 64, and even the Itanium and Itanium 2 have a 64-bit (8-byte) wide data bus. Therefore, they can transfer 64 bits of data at a time to and from the motherboard chipset or system memory.

A good way to understand this flow of information is to consider a highway and the traffic it carries. If a highway has only one lane for each direction of travel, only one car at a time can move in a certain direction. If you want to increase traffic flow, you can add another lane so that twice as many cars pass in a specified time.

You can think of an 8-bit chip as being a single-lane highway because 1 byte flows through at a time. (1 byte equals 8 individual bits.) The 16-bit chip, with 2 bytes flowing at a time, resembles a two-lane highway. You might have four lanes in each direction to move a large number of automobiles; this structure corresponds to a 32-bit data bus, which has the capability to move 4 bytes of information at a time.

Taking this further, a 64-bit data bus is like having an 8-lane highway moving data in and out of the chip. Another ramification of the data bus in a chip is that the width of the data bus also defines the size of a bank of memory. So, a processor with a 32-bit data bus such as the 486, reads and writes memory 32 bits at a time.

Pentium-class processors, including the Pentium III, Celeron, Pentium 4, and Athlon XP, read and write memory 64 bits at a time. 64-bit processors such as the Athlon 64 and Itanium series also read and write memory 64 bits at a time.

In 486 class systems, because standard 72-pin single inline memory modules (SIMMs) are only 32 bits wide, they must be installed one at a time in most 486 class systems. When used in 64-bit Pentium class systems, they must be installed two at a time. The current module standard, dual inline memory modules (DIMMs), are 64 bits wide.

So, they are normally installed one at a time in Pentium or newer systems. Each DIMM is equal to a complete bank of memory on a 64-bit data bus, which makes system configuration easy because they can then be installed or removed one at a time.

Starting in 2003 and beyond, these classic rules for adding DIMM memory will begin to change, as dual-channel chipsets such as the Intel 865 and 875 for the Pentium 4/Celeron 4 and the first Athlon 64 chipsets are introduced. To improve memory performance, these and most, if not all, future chipsets will support and eventually require that DIMM memory modules be installed in identical pairs.

The Rambus inline memory modules (RIMMs) used in some Pentium III and 4 systems are somewhat of an anomaly because they play by a different set of rules. They are typically only 16 or 32 bits wide. Depending on the module type and chipset, they are either used individually or in pairs.

Address Bus

The address bus is the set of wires that carries the addressing information used to describe the memory location to which the data is being sent or from which the data is being retrieved. As with the data bus, each wire in an address bus carries a single bit of information. This single bit is a single digit in the address.

The more wires (digits) used in calculating these addresses, the greater the total number of address locations. The size (or width) of the address bus indicates the maximum amount of RAM a chip can address. The highway analogy in the "Data I/O Bus" section can be used to show how the address bus fits in.

If the data bus is the highway and the size of the data bus is equivalent to the number of lanes, the address bus relates to the house number or street address. The size of the address bus is equivalent to the number of digits in the house address number.

For example, if you live on a street in which the address is limited to a two-digit (base 10) number, no more than 100 distinct addresses (00–99) can exist for that street (102). Add another digit, and the number of available addresses increases to 1,000 (000–999), or 103.

Computers use the binary (base 2) numbering system, so a two-digit number provides only four unique addresses (00, 01, 10, and 11), calculated as 22. A three-digit number provides only eight addresses (000–111), which is 23. For example, the 8086 and 8088 processors use a 20-bit address bus that calculates as a maximum of 220 or 1,048,576 bytes (1MB) of address locations.

The data bus and address bus are independent, and chip designers can use whatever size they want for each. Usually, however, chips with larger data buses have larger address buses.

The sizes of the buses can provide important information about a chip's relative power, measured in two important ways. The size of the data bus is an indication of the chip's information-moving capability, and the size of the address bus tells you how much memory the chip can handle.

Internal Registers (Internal Data Bus)

The size of the internal registers indicates how much information the processor can operate on at one time and how it moves data around internally within the chip. This is sometimes also referred to as the internal data bus. A register is a holding cell within the processor; for example, the processor can add numbers in two different registers, storing the result in a third register.

The register size determines the size of data on which the processor can operate. The register size also describes the type of software or commands and instructions a chip can run. That is, processors with 32-bit internal registers can run 32-bit instructions that are processing 32-bit chunks of data, but processors with 16-bit registers can't.

Most advanced processors today—chips from the 386 to the Pentium 4—use 32-bit internal registers and can therefore run the same 32-bit operating systems and software. The Itanium and Athlon 64 processors have 64-bit internal registers, which require new operating systems and software to fully be utilized.

Some very old processors have an internal data bus (made up of data paths and storage units called registers) that is larger than the external data bus. The 8088 and 386SX are examples of this structure. Each chip has an internal data bus twice the width of the external bus.

These designs, which sometimes are called hybrid designs, usually are low-cost versions of a "pure" chip. The 386SX, for example, can pass data around internally with a full 32-bit register size; for communications with the outside world, however, the chip is restricted to a 16-bit-wide data path.

This design enabled a systems designer to build a lower-cost motherboard with a 16-bit bus design and still maintain software and instruction set compatibility with the full 32-bit 386. However, both the 8088 and the 386SX had lower performance than the 8086 and 386DX processors at the same speeds.

Internal registers often are larger than the data bus, which means the chip requires two cycles to fill a register before the register can be operated on. For example, both the 386SX and 386DX have internal 32-bit registers, but the 386SX must "inhale" twice (figuratively) to fill them, whereas the 386DX can do the job in one "breath."

The same thing would happen when the data is passed from the registers back out to the system bus. The Pentium is an example of this type of design. All Pentiums have a 64-bit data bus and 32-bit registers—a structure that might seem to be a problem until you understand that the Pentium has two internal 32-bit pipelines for processing information.

In many ways, the Pentium is like two 32-bit chips in one. The 64-bit data bus provides for very efficient filling of these multiple registers. Multiple pipelines are called superscalar architecture, which was introduced with the Pentium processor.

More advanced sixth-generation processors, such as the Pentium III, Athlon XP, and Pentium 4, have as many as six internal pipelines for executing instructions. Although some of these internal pipes are dedicated to special functions, these processors can execute as many as six (Pentium 4) or nine (Athlon XP) operations in one clock cycle.